Fix the return address stack so it can handle 16-bit addresses, remove an unused library from the disassembler code, and tidy up the disassembler code and the readme a bit
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@ -1,6 +1,6 @@
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program Disassembler;
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program Disassembler;
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uses Crt, Sysutils;
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uses Sysutils;
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var
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var
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Op, Regs: 0 .. $f; //Opcode, and register arguments in a single variable
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Op, Regs: 0 .. $f; //Opcode, and register arguments in a single variable
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@ -90,16 +90,13 @@ begin
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write (Opcodes [Op]);
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write (Opcodes [Op]);
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if Op = $b then writeln (IntToHex (Addr, 1), ', R', X)
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if Op = $b then writeln (IntToHex (Addr, 1), ', R', X)
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else begin
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else begin
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if Op >= 2 then if Op <> $b then write ('R', X);
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if Op >= 2 then write ('R', X);
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if Op >= 6 then if Op <= 9 then write (', R', Y);
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if Op >= 6 then if Op <= 9 then write (', R', Y);
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if OP >= $c then write (', R', Y);
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if OP >= $c then write (', R', Y);
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if Op >= $a then write (', ', IntToHex (Addr, 1));
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if Op >= $a then write (', ', IntToHex (Addr, 1));
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writeln ();
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writeln ();
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end;
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end;
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until (BP >= EP);
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until (BP >= EP);
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end.
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end.
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24
emulator.pas
24
emulator.pas
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@ -56,10 +56,12 @@ begin
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if IP > $ffef then break;
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if IP > $ffef then break;
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//Address argument
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//Address argument
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if Op >= $a then begin
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if Op >= $a then begin
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//High byte
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Addr := Mem [IP];
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Addr := Mem [IP];
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Addr := Addr shl 8;
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Addr := Addr shl 8;
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IP := IP + 1;
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IP := IP + 1;
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if IP > $ffef then break;
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if IP > $ffef then break;
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//Low byte
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Addr := Addr + Mem [IP];
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Addr := Addr + Mem [IP];
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IP := IP + 1;
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IP := IP + 1;
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if IP > $ffef then break;
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if IP > $ffef then break;
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@ -70,7 +72,13 @@ begin
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if Op = 0 then Halt := true
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if Op = 0 then Halt := true
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//Ret
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//Ret
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else if Op = 1 then begin
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else if Op = 1 then begin
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//High byte of the return address
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IP := Mem [RP];
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IP := Mem [RP];
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IP := IP shl 8;
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RP := RP + 1;
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if RP > $fff0 then break;
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//Low byte of the return address
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IP := IP + Mem [RP];
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RP := RP + 1;
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RP := RP + 1;
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if RP > $fff0 then break;
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if RP > $fff0 then break;
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end
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end
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@ -122,9 +130,15 @@ begin
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//Cleq
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//Cleq
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else if Op = $e then begin
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else if Op = $e then begin
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if R [X] = R [Y] then begin
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if R [X] = R [Y] then begin
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//Low byte of the return address
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RP := RP - 1;
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RP := RP - 1;
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if RP > $fff0 then break;
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if RP > $fff0 then break;
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Mem [RP] := IP;
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Mem [RP] := IP and $ff;
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//High byte of the return address
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RP := RP - 1;
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if RP > $fff0 then break;
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Mem [RP] := IP shr 8;
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//Call
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IP := Addr;
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IP := Addr;
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if IP > $ffef then break;
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if IP > $ffef then break;
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end;
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end;
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@ -132,9 +146,15 @@ begin
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//Clneq
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//Clneq
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else if Op = $f then begin
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else if Op = $f then begin
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if R [X] <> R [Y] then begin
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if R [X] <> R [Y] then begin
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//Low byte of the return address
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RP := RP - 1;
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RP := RP - 1;
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if RP > $fff0 then break;
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if RP > $fff0 then break;
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Mem [RP] := IP;
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Mem [RP] := IP and $ff;
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//High byte of the return address
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RP := RP - 1;
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if RP > $fff0 then break;
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Mem [RP] := IP shr 8;
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//Call
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IP := Addr;
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IP := Addr;
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if IP > $ffef then break;
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if IP > $ffef then break;
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end;
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end;
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23
readme.md
23
readme.md
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@ -1,7 +1,7 @@
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Thingamajig
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Thingamajig
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===========
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===========
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Thingamajig is a RISC-y and MISC-y hobbyist computer architecture. Its
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Thingamajig is a RISC-y and MISC-y homebrew computer architecture. Its
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git repository can be found at
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git repository can be found at
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https://ahti.space/git/crazyettin/Thingamajig.
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https://ahti.space/git/crazyettin/Thingamajig.
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@ -14,10 +14,10 @@ Registers and Memory
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* 8-bit memory addresses 0-FFFF
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* 8-bit memory addresses 0-FFFF
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Multi-byte values are big-endian. Memory addresses FFF0-FFFF are
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Multi-byte values are big-endian. Memory addresses FFF0-FFFF are
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reserved for memory mapped devices. The instruction and return pointers
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reserved for memory mapped devices; the instruction and return pointers
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cannot have values higher than FFEF and FFF0 respectively to avoid the
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cannot have values higher than FFEF and FFF0 respectively to avoid them.
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reserved addresses. The instruction and return pointers are initialised
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The instruction and return pointers are initialised as 0 and FFF0
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as 0 and FFF0 respectively; other registers and memory are unitialised.
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respectively, while other registers and memory are unitialised.
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Instructions
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Instructions
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------------
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------------
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@ -27,7 +27,7 @@ Instructions without an address argument are 8-bit and those with one
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modified.
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modified.
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0 HALT
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0 HALT
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1 RET IP = *RP; RP += 1
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1 RET IP = *RP; RP += 2
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2 SHL RX RX <<= 1 Logical shifts
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2 SHL RX RX <<= 1 Logical shifts
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3 SHR RX RX >>= 1
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3 SHR RX RX >>= 1
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@ -46,15 +46,14 @@ B STORE RX, ADDR *ADDR = RX Written as "STORE ADDR, RX" in
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C BREQ RX, RY, ADDR if (RX == RY) IP = ADDR
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C BREQ RX, RY, ADDR if (RX == RY) IP = ADDR
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D BRNEQ RX, RY, ADDR if (RX != RY) IP = ADDR
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D BRNEQ RX, RY, ADDR if (RX != RY) IP = ADDR
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E CLEQ RX, RY, ADDR if (RX == RY) {RP -= 1; *RP = IP; IP = ADDR}
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E CLEQ RX, RY, ADDR if (RX == RY) {RP -= 2; *RP = IP; IP = ADDR}
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F CLNEQ RX, RY, ADDR if (RX != RY) {RP -= 1; *RP = IP; IP = ADDR}
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F CLNEQ RX, RY, ADDR if (RX != RY) {RP -= 2; *RP = IP; IP = ADDR}
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Memory-Mapped Devices
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Memory-Mapped Devices
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---------------------
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---------------------
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Input (when read from) and output (when written to) are mapped to
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Input (when read from) and output (when written to) are mapped to
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address FFFF. The emulator implements this by emulating a dumb serial
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address FFFF. The emulator emulates a dumb terminal for this.
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terminal.
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Arbitrary devices can be mapped to the other reserved addresses.
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Arbitrary devices can be mapped to the other reserved addresses.
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@ -62,5 +61,5 @@ Initial Program Loader
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----------------------
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----------------------
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At boot the initial program loader loads a program to the memory
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At boot the initial program loader loads a program to the memory
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starting from address 0 after which is cedes control to the processor.
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starting from address 0 after which is cedes control to the CPU. The
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The emulator loads the program from a file.
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emulator loads the program from a file.
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