101 lines
3.4 KiB
C++
101 lines
3.4 KiB
C++
//
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// isr.c -- High level interrupt service routines and interrupt request handlers.
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// Part of this code is modified from Bran's kernel development tutorials.
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// Rewritten for JamesM's kernel development tutorials.
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//
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#include "platform.h"
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#include "iirqhandler.h"
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#include "log.h"
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#include "isr.h"
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#include "panic.h"
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#include "process.h" // Hack for SIGSEGV
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#include "sound.h" // Hack for SIGSEGV
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using namespace Sortix;
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size_t numknownexceptions = 19;
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const char* exceptions[] = { "Divide by zero", "Debug", "Non maskable interrupt", "Breakpoint",
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"Into detected overflow", "Out of bounds", "Invalid opcode",
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"No coprocessor", "Double fault", "Coprocessor segment overrun",
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"Bad TSS", "Segment not present", "Stack fault",
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"General protection fault", "Page fault", "Unknown interrupt",
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"Coprocessor fault", "Alignment check", "Machine check" };
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Sortix::InterruptHandler interrupt_handlers[256];
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void register_interrupt_handler(uint8_t n, Sortix::InterruptHandler handler)
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{
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interrupt_handlers[n] = handler;
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}
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// This gets called from our ASM interrupt handler stub.
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extern "C" void isr_handler(Sortix::CPU::InterruptRegisters* Regs)
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{
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#ifdef PLATFORM_X86
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if ( Regs->int_no < 32 )
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{
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const char* message = ( Regs->int_no < numknownexceptions )
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? exceptions[Regs->int_no] : "Unknown";
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// Halt and catch fire if we are the kernel.
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if ( (Regs->cs & (0x4-1)) == 0 )
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{
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PanicF("Unhandled CPU Exception id %zu '%s' at eip=0x%zx "
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"(cr2=0x%p, err_code=0x%p)", Regs->int_no, message,
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Regs->eip, Regs->cr2, Regs->err_code);
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}
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Log::Print("The current program has crashed and was terminated:\n");
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Log::PrintF("%s exception at eip=0x%zx (cr2=0x%p, err_code=0x%p)\n",
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message, Regs->eip, Regs->cr2, Regs->err_code);
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Sound::Mute();
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const char* programname = "sh";
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Regs->ebx = (uint32_t) programname;
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SysExecute(Regs);
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return;
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}
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if ( interrupt_handlers[Regs->int_no] != NULL )
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{
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interrupt_handlers[Regs->int_no](Regs);
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}
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#else
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#warning "ISR handlers are not supported on this arch"
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while(true);
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#endif
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}
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// This gets called from our ASM interrupt handler stub.
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extern "C" void irq_handler(Sortix::CPU::InterruptRegisters* Regs)
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{
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#ifdef PLATFORM_X86
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if ( Regs->int_no != 32 && Regs->int_no != 33 )
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{
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//Sortix::Log::PrintF("IRQ eax=%u, int_no=%u, err_code=%u, eip=0x%x!\n", Regs->eax, Regs->int_no, Regs->err_code, Regs->eip);
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}
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// TODO! IRQ 7 and 15 might be spurious and might need to be ignored.
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// See http://wiki.osdev.org/PIC for details (section Spurious IRQs).
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if ( Regs->int_no == 32 + 7 || Regs->int_no == 32 + 15 ) { return; }
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if ( Regs->int_no < 32 || 48 < Regs->int_no ) { Sortix::PanicF("IRQ eax=%u, int_no=%u, err_code=%u, eip=%u!", Regs->eax, Regs->int_no, Regs->err_code, Regs->eip); }
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// Send an EOI (end of interrupt) signal to the PICs.
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if (Regs->int_no >= 40) { Sortix::X86::OutPortB(0xA0, 0x20); } // Send reset signal to slave if this interrupt involved the slave.
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Sortix::X86::OutPortB(0x20, 0x20); // Send reset signal to master.
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if ( interrupt_handlers[Regs->int_no] != NULL )
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{
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interrupt_handlers[Regs->int_no](Regs);
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}
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#else
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#warning "IRQ handlers are not supported on this arch"
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while(true);
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#endif
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}
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